Guillume DIDIER
843cf63ba9
Add preliminary support for IP control
2021-10-13 15:39:05 +02:00
Guillume DIDIER
b2f7a80395
Fix compile issues
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This is a stop gap solution selecting the calibration strategy at compile time.
2021-10-13 14:40:41 +02:00
Guillume DIDIER
c8f035d76d
Fix deprecation warning
2021-10-13 14:08:57 +02:00
Guillume DIDIER
73d0cceed6
Merge remote-tracking branch 'origin/g5k'
2021-10-13 13:54:19 +02:00
Guillume DIDIER
27d592274c
Stub the module in charge of controlling instruction pointers
2021-10-13 13:53:20 +02:00
Guillume DIDIER
6f32c1b469
Add support for various calibration strategies.
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The generic channel can now be told to calibrate using a AV model (a Attacker and Victim socket model is stubbed but not implemented).
2021-10-13 13:52:38 +02:00
Guillaume Didier
8c77c1558d
Fix comments
2021-10-01 16:38:44 +02:00
Guillaume Didier
3dd5148fe5
Merge branch 'g5k' of https://gitlab.inria.fr/uarch/dendrobates-t-azureus
2021-10-01 11:04:35 +02:00
Guillaume Didier
f7132c911c
Optimised experiments
2021-10-01 11:02:20 +02:00
Guillaume Didier
c7b0cc4130
Do not calibrate unneeded ops
2021-09-29 16:45:13 +02:00
Guillaume Didier
c43daf8499
Fix bug in unsupported hashing that resulted in a ridiculous number of iteration
2021-09-29 11:24:23 +02:00
Guillume DIDIER
e3ef141792
Performance tweaks
2021-09-29 09:52:12 +02:00
Guillaume Didier
bb0b008bbe
cpupower for grid5k
2021-09-28 15:34:31 +02:00
Guillume DIDIER
6f8ae88e58
Fixes around cacheline length magic number
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Cache line length is now a constant. This should eventually be replaced with some sort of lazy static info, that is extracted from CPUID if possible.
2021-09-28 08:55:12 +02:00
Guillume DIDIER
d6c387b0d0
Fix deprecation warning
2021-09-27 16:30:08 +02:00
Guillume DIDIER
a272c79127
More work on unknown cache slicing handling
2021-09-27 16:27:53 +02:00
Guillume DIDIER
01ae16b015
Ensure the calibration infrastructure works correctly.
2021-09-27 11:35:51 +02:00
Guillume DIDIER
646db42766
Start work on a Cache Slicing type that fallsback gracefully, for cache attack purposes.
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It falls back to using the cache line virtual addr (without offset) as the hash when the hashing function is unknown.
Still work in progress to implment all the required functions, and then adpat any user to thechange in types.
2021-09-20 15:44:14 +02:00
Guillume DIDIER
8d78c70dae
Rust Update, clean up MMappedMemory
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Ensure the code compiles with the latest rust nightly version, and fixes some unsafety in MMappedMemory
2021-09-20 14:45:40 +02:00
Guillaume DIDIER
c12a3ba29b
Fix missing --bin in cargo invocation
2021-08-02 15:57:52 +02:00
Guillume DIDIER
0e60fd62ba
Add missing scripts
2021-08-02 15:53:58 +02:00
Guillume DIDIER
bf931bfa52
Various experiments
2021-08-02 15:02:52 +02:00
Guillume DIDIER
84cf28f21c
Reproduce the pattern from the other paper
2021-07-25 10:01:41 +02:00
Guillume DIDIER
3f0f12d118
Tweaks that reduce overhead and show prefetch occuring where expected
2021-07-21 17:29:18 +02:00
Guillume DIDIER
19b07d1b1f
Change the implementation of various traites to ensure test_single is low overhead
2021-07-21 17:29:02 +02:00
Guillume DIDIER
2d179897bf
More test cases
2021-07-19 11:33:17 +02:00
Guillume DIDIER
e4940abe82
Update Display for FullPageDualProbeResults
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This now has proper header and table alignment.
2021-07-19 10:54:30 +02:00
Guillume DIDIER
7c563b1a71
The core per socket logic is not robust to padding
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Added some fixmes
2021-07-19 10:53:46 +02:00
Guillume DIDIER
bf347f7a12
Switch back to improved F+R
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The channel claibration issue ought to be fixed by 4cbacf96
2021-07-19 09:47:35 +02:00
Guillume DIDIER
4cf1fa220f
Backport from 5c9ac31ab the logic avoid unnecessary iterations
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Improved version of the covert channels do not need to iterate over all core pairs (they pick their own core pair, and already iterate on all of them as part of calibration).
This avoids an unnecessary n^4 complexity, and reduces it to n^2, where n is the number of cores.
2021-07-19 09:36:25 +02:00
Guillume DIDIER
3c8c00facb
Fix compile issue
2021-07-19 09:33:54 +02:00
Guillume DIDIER
78c4018a04
Document issues around number of handles per page / cache line
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The two channel used to have different invariants. Currently the enforcement of any limitation of handle per page or handle per cache line has been removed, hence document this issue in the code.
2021-07-19 09:17:09 +02:00
Guillume DIDIER
4cbacf96a9
Fix a bug in the improved Basic Timing Cache Channel calibration
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The cache line were not properly reset to Invalid state, which messe up F+R calibration.
The Invalid state calibration is now done with a flush victim op, instead of a noop.
2021-07-19 09:15:20 +02:00
Guillume DIDIER
3022794752
Hotfix - Use naive F+R instead of F+R
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F+R currently has a calibration bug
2021-07-19 09:02:08 +02:00
Guillume DIDIER
28f75075e3
Hotfix naive basic timing cache channel for use in prefetcher experiments
2021-07-19 09:01:24 +02:00
Guillume DIDIER
b7b5cbbfc3
Update the cache channel interface
2021-06-28 16:26:02 +02:00
Guillume DIDIER
1b38b4913c
Commit prefetcher reverse work
2021-06-10 11:25:07 +02:00
Guillume DIDIER
bad23161a2
Rust nightly update - dendrobates
2021-06-10 11:24:28 +02:00
Guillume DIDIER
9c569fb7ec
Rust nightly update - turn_lock
2021-06-10 11:23:13 +02:00
Guillume DIDIER
0531f8d083
Rust nightly update - polling serial & vga_buffer
2021-06-10 11:22:50 +02:00
Guillume DIDIER
b9980aa67b
Rust nightly update - FF & FR
2021-06-10 11:22:21 +02:00
Guillume DIDIER
451bc99fdc
Rust nightly update - cpuid
2021-06-10 11:21:38 +02:00
Guillume DIDIER
f9fd75e3e9
Rust nightly update - covert_channel_evaluation
2021-06-10 11:21:23 +02:00
Guillume DIDIER
7ecb6f5244
Rust nightly update - covert_channel_benchmark
2021-06-10 11:20:34 +02:00
Guillume DIDIER
7696086e6d
Rust nightly update - cache_utils
2021-06-10 11:19:00 +02:00
Guillume DIDIER
26538fe913
Rust nightly update - cache_side_channel
2021-06-10 11:18:19 +02:00
Guillume DIDIER
e4c838e8b0
Rust nightly update - basic_timing_cache_channel
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Make sure this compiles with th newer nightly
2021-06-10 11:17:31 +02:00
Guillume DIDIER
3b85161eb2
Rust nightly update - aes-t-tables
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Ensure it compiles with the newer nightly.
2021-06-10 11:16:09 +02:00
Guillume DIDIER
4bc389272f
Start working on prefetcher reverse engineering experiment
2021-03-22 16:13:01 +01:00
Guillume DIDIER
0bd575f251
update AES for the new side channel API
2021-02-16 11:33:29 +01:00