4cbacf96a9
The cache line were not properly reset to Invalid state, which messe up F+R calibration. The Invalid state calibration is now done with a flush victim op, instead of a noop. |
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.cargo | ||
.idea | ||
aes-t-tables | ||
basic_timing_cache_channel | ||
cache_side_channel | ||
cache_utils | ||
covert_channels_benchmark | ||
covert_channels_evaluation | ||
cpuid | ||
flush_flush | ||
flush_reload | ||
polling_serial | ||
prefetcher_reverse | ||
results-27-02-2020-60fe76e366 | ||
scripts | ||
src | ||
tests | ||
turn_lock | ||
vga_buffer | ||
.gitignore | ||
Cargo.lock | ||
Cargo.toml | ||
Readme.md | ||
requirements.txt | ||
rust-toolchain | ||
stty.sh | ||
x86_64-D.TinctoriusAzureus.json |
Dendrobates Tinctorius Azureus - The blue poison frog
This is a minimal kernel (written in rust) meant to help idissect (reverse engineer) Intel CPUs (hence the blue color of the chosen frog)
Everything remains to be done.
Design decision :
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Will only ever have one user process
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Should limit use of interrupts as much as possible
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Should support as many instructions as possible, make sure to properly enable all floating points and vector extensions
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Get a kernel to boot
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Get serial console
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Deal with cpuid / floating point niceties
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Deal with the user mode switch