2024-10-06 19:58:11 +02:00
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# MiniC Compiler
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2024-11-25 23:50:51 +01:00
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LAB5a (Control Flow Graph in SSA Form) & LAB5b (Smart Register Allocation), CAP 2023-24
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2024-10-06 19:58:11 +02:00
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# Authors
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2024-11-25 23:50:51 +01:00
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Augustin LUCAS
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2024-10-06 19:58:11 +02:00
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# Contents
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2024-11-25 23:50:51 +01:00
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Extension implemented : Optimizing swap
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- Cycles of size 1 : skip
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- Cycles of size 2 : use 3 XOR operations to swap the registers values without any temporary register use
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2024-10-06 19:58:11 +02:00
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# Test design
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2024-11-25 23:50:51 +01:00
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No tests were added since some of the `students`' tests from lab4 still failed to execute properly.
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2024-10-06 19:58:11 +02:00
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# Known bugs
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2024-11-25 23:50:51 +01:00
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Failing tests:
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- `./TP04/tests/students/ext-for-fortran/test_imbricated_for.c`
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- `./TP04/tests/students/ext-for-fortran/test_for.c`
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- `./TP04/tests/students/base/test_nested_while.c`
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- `./TP04/tests/students/base/test_fibonacci.c`
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- `./TP04/tests/provided/dataflow/df03.c`
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The bug seems to be related to the handling of Offsets because a lot more tests will fail if temporaries are only assigned to memory (no registers).
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This can be done by commenting `TP05/SmartAllocator.py:124`.
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This seems to affect `while` and `for` loops as well as regular variables (because variables may not be stored/loaded correctly).
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