Add lstopo-paravance-37.xml
This commit is contained in:
parent
eaf59e86dc
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393
data/paravance/lstopo-paravance-37.xml
Normal file
393
data/paravance/lstopo-paravance-37.xml
Normal file
@ -0,0 +1,393 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<!DOCTYPE topology SYSTEM "hwloc2.dtd">
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<topology version="2.0">
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<object type="Machine" os_index="0" cpuset="0xffffffff" complete_cpuset="0xffffffff" allowed_cpuset="0xffffffff" nodeset="0x00000003" complete_nodeset="0x00000003" allowed_nodeset="0x00000003" gp_index="1">
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<info name="DMIProductName" value="PowerEdge R630"/>
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<info name="DMIProductVersion" value=""/>
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<info name="DMIBoardVendor" value="Dell Inc."/>
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<info name="DMIBoardName" value="0CNCJW"/>
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<info name="DMIBoardVersion" value="A05"/>
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<info name="DMIChassisVendor" value="Dell Inc."/>
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<info name="DMIChassisType" value="23"/>
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<info name="DMIChassisVersion" value=""/>
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<info name="DMIChassisAssetTag" value=""/>
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<info name="DMIBIOSVendor" value="Dell Inc."/>
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<info name="DMIBIOSVersion" value="2.13.0"/>
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<info name="DMIBIOSDate" value="05/14/2021"/>
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<info name="DMISysVendor" value="Dell Inc."/>
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<info name="Backend" value="Linux"/>
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<info name="LinuxCgroup" value="/oar/alucas_2182373"/>
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<info name="OSName" value="Linux"/>
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<info name="OSRelease" value="5.10.0-28-amd64"/>
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<info name="OSVersion" value="#1 SMP Debian 5.10.209-2 (2024-01-31)"/>
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<info name="HostName" value="paravance-7.rennes.grid5000.fr"/>
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<info name="Architecture" value="x86_64"/>
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<info name="hwlocVersion" value="2.9.0"/>
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<info name="ProcessName" value="lstopo"/>
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<object type="Package" os_index="0" cpuset="0x55555555" complete_cpuset="0x55555555" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="3">
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<info name="CPUVendor" value="GenuineIntel"/>
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<info name="CPUFamilyNumber" value="6"/>
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<info name="CPUModelNumber" value="63"/>
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<info name="CPUModel" value="Intel(R) Xeon(R) CPU E5-2630 v3 @ 2.40GHz"/>
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<info name="CPUStepping" value="2"/>
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<object type="NUMANode" os_index="0" cpuset="0x55555555" complete_cpuset="0x55555555" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="102" local_memory="67341725696">
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<page_type size="4096" count="16440851"/>
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<page_type size="2097152" count="0"/>
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<page_type size="1073741824" count="0"/>
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</object>
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<object type="L3Cache" os_index="0" cpuset="0x55555555" complete_cpuset="0x55555555" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="8" cache_size="20971520" depth="3" cache_linesize="64" cache_associativity="20" cache_type="0">
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<info name="Inclusive" value="1"/>
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<object type="L2Cache" os_index="0" cpuset="0x00010001" complete_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="7" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
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<info name="Inclusive" value="0"/>
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<object type="L1Cache" os_index="0" cpuset="0x00010001" complete_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="5" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
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<info name="Inclusive" value="0"/>
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<object type="L1iCache" os_index="0" cpuset="0x00010001" complete_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="6" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
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<info name="Inclusive" value="0"/>
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<object type="Core" os_index="0" cpuset="0x00010001" complete_cpuset="0x00010001" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="2">
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<object type="PU" os_index="0" cpuset="0x00000001" complete_cpuset="0x00000001" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="4"/>
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<object type="PU" os_index="16" cpuset="0x00010000" complete_cpuset="0x00010000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="86"/>
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</object>
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</object>
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</object>
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</object>
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<object type="L2Cache" os_index="1" cpuset="0x00040004" complete_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="20" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
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<info name="Inclusive" value="0"/>
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<object type="L1Cache" os_index="1" cpuset="0x00040004" complete_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="18" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
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<info name="Inclusive" value="0"/>
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<object type="L1iCache" os_index="1" cpuset="0x00040004" complete_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="19" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
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<info name="Inclusive" value="0"/>
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<object type="Core" os_index="1" cpuset="0x00040004" complete_cpuset="0x00040004" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="16">
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<object type="PU" os_index="2" cpuset="0x00000004" complete_cpuset="0x00000004" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="17"/>
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<object type="PU" os_index="18" cpuset="0x00040000" complete_cpuset="0x00040000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="88"/>
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</object>
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</object>
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</object>
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</object>
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<object type="L2Cache" os_index="2" cpuset="0x00100010" complete_cpuset="0x00100010" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="30" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
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<info name="Inclusive" value="0"/>
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<object type="L1Cache" os_index="2" cpuset="0x00100010" complete_cpuset="0x00100010" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="28" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
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<info name="Inclusive" value="0"/>
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<object type="L1iCache" os_index="2" cpuset="0x00100010" complete_cpuset="0x00100010" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="29" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
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<info name="Inclusive" value="0"/>
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<object type="Core" os_index="2" cpuset="0x00100010" complete_cpuset="0x00100010" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="26">
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<object type="PU" os_index="4" cpuset="0x00000010" complete_cpuset="0x00000010" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="27"/>
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<object type="PU" os_index="20" cpuset="0x00100000" complete_cpuset="0x00100000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="90"/>
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</object>
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</object>
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</object>
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</object>
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<object type="L2Cache" os_index="3" cpuset="0x00400040" complete_cpuset="0x00400040" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="40" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
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<info name="Inclusive" value="0"/>
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<object type="L1Cache" os_index="3" cpuset="0x00400040" complete_cpuset="0x00400040" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="38" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
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<info name="Inclusive" value="0"/>
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<object type="L1iCache" os_index="3" cpuset="0x00400040" complete_cpuset="0x00400040" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="39" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
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<info name="Inclusive" value="0"/>
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<object type="Core" os_index="3" cpuset="0x00400040" complete_cpuset="0x00400040" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="36">
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<object type="PU" os_index="6" cpuset="0x00000040" complete_cpuset="0x00000040" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="37"/>
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<object type="PU" os_index="22" cpuset="0x00400000" complete_cpuset="0x00400000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="92"/>
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</object>
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</object>
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</object>
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</object>
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<object type="L2Cache" os_index="4" cpuset="0x01000100" complete_cpuset="0x01000100" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="50" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
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<info name="Inclusive" value="0"/>
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<object type="L1Cache" os_index="4" cpuset="0x01000100" complete_cpuset="0x01000100" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="48" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
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<info name="Inclusive" value="0"/>
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<object type="L1iCache" os_index="4" cpuset="0x01000100" complete_cpuset="0x01000100" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="49" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
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<info name="Inclusive" value="0"/>
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<object type="Core" os_index="4" cpuset="0x01000100" complete_cpuset="0x01000100" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="46">
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<object type="PU" os_index="8" cpuset="0x00000100" complete_cpuset="0x00000100" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="47"/>
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<object type="PU" os_index="24" cpuset="0x01000000" complete_cpuset="0x01000000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="94"/>
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</object>
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</object>
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</object>
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</object>
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<object type="L2Cache" os_index="5" cpuset="0x04000400" complete_cpuset="0x04000400" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="60" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
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<info name="Inclusive" value="0"/>
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<object type="L1Cache" os_index="5" cpuset="0x04000400" complete_cpuset="0x04000400" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="58" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
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<info name="Inclusive" value="0"/>
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<object type="L1iCache" os_index="5" cpuset="0x04000400" complete_cpuset="0x04000400" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="59" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
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<info name="Inclusive" value="0"/>
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<object type="Core" os_index="5" cpuset="0x04000400" complete_cpuset="0x04000400" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="56">
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<object type="PU" os_index="10" cpuset="0x00000400" complete_cpuset="0x00000400" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="57"/>
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<object type="PU" os_index="26" cpuset="0x04000000" complete_cpuset="0x04000000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="96"/>
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</object>
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</object>
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</object>
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</object>
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<object type="L2Cache" os_index="6" cpuset="0x10001000" complete_cpuset="0x10001000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="70" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
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<info name="Inclusive" value="0"/>
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<object type="L1Cache" os_index="6" cpuset="0x10001000" complete_cpuset="0x10001000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="68" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
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<info name="Inclusive" value="0"/>
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<object type="L1iCache" os_index="6" cpuset="0x10001000" complete_cpuset="0x10001000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="69" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
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<info name="Inclusive" value="0"/>
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<object type="Core" os_index="6" cpuset="0x10001000" complete_cpuset="0x10001000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="66">
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<object type="PU" os_index="12" cpuset="0x00001000" complete_cpuset="0x00001000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="67"/>
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<object type="PU" os_index="28" cpuset="0x10000000" complete_cpuset="0x10000000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="98"/>
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</object>
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</object>
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</object>
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</object>
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<object type="L2Cache" os_index="7" cpuset="0x40004000" complete_cpuset="0x40004000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="80" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
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<info name="Inclusive" value="0"/>
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<object type="L1Cache" os_index="7" cpuset="0x40004000" complete_cpuset="0x40004000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="78" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
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<info name="Inclusive" value="0"/>
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<object type="L1iCache" os_index="7" cpuset="0x40004000" complete_cpuset="0x40004000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="79" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
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<info name="Inclusive" value="0"/>
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<object type="Core" os_index="7" cpuset="0x40004000" complete_cpuset="0x40004000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="76">
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<object type="PU" os_index="14" cpuset="0x00004000" complete_cpuset="0x00004000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="77"/>
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<object type="PU" os_index="30" cpuset="0x40000000" complete_cpuset="0x40000000" nodeset="0x00000001" complete_nodeset="0x00000001" gp_index="100"/>
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</object>
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</object>
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</object>
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</object>
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</object>
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<object type="Bridge" gp_index="126" bridge_type="0-1" depth="0" bridge_pci="0000:[00-0c]">
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<object type="Bridge" gp_index="109" bridge_type="1-1" depth="1" bridge_pci="0000:[03-03]" pci_busid="0000:00:01.0" pci_type="0604 [8086:2f02] [8086:0000] 02" pci_link_speed="7.876923">
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<info name="PCIVendor" value="Intel Corporation"/>
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<info name="PCIDevice" value="Xeon E7 v3/Xeon E5 v3/Core i7 PCI Express Root Port 1"/>
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<object type="PCIDev" gp_index="104" pci_busid="0000:03:00.0" pci_type="0104 [1000:005f] [1028:1f4b] 02" pci_link_speed="7.876923">
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<info name="PCIVendor" value="Broadcom / LSI"/>
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<info name="PCIDevice" value="MegaRAID SAS-3 3008 [Fury]"/>
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<object type="OSDev" gp_index="128" name="sdb" subtype="Disk" osdev_type="0">
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<info name="Size" value="586061784"/>
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<info name="SectorSize" value="512"/>
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<info name="LinuxDeviceID" value="8:16"/>
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<info name="Vendor" value="SEAGATE"/>
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<info name="Model" value="ST600MM0006"/>
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<info name="Revision" value="LS0C"/>
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<info name="SerialNumber" value="5000c50062eaafe3"/>
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</object>
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||||
<object type="OSDev" gp_index="129" name="sda" subtype="Disk" osdev_type="0">
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<info name="Size" value="586061784"/>
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<info name="SectorSize" value="512"/>
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<info name="LinuxDeviceID" value="8:0"/>
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||||
<info name="Vendor" value="SEAGATE"/>
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<info name="Model" value="ST600MM0006"/>
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<info name="Revision" value="LS0C"/>
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||||
<info name="SerialNumber" value="5000c50062e9e3f7"/>
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</object>
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</object>
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||||
</object>
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||||
<object type="Bridge" gp_index="119" bridge_type="1-1" depth="1" bridge_pci="0000:[01-02]" pci_busid="0000:00:03.0" pci_type="0604 [8086:2f08] [8086:0000] 02" pci_link_speed="4.923077">
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<info name="PCIVendor" value="Intel Corporation"/>
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||||
<info name="PCIDevice" value="Xeon E7 v3/Xeon E5 v3/Core i7 PCI Express Root Port 3"/>
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||||
<object type="PCIDev" gp_index="113" pci_busid="0000:01:00.0" pci_type="0200 [8086:10fb] [1028:1f72] 01" pci_link_speed="4.923077">
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||||
<info name="PCIVendor" value="Intel Corporation"/>
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||||
<info name="PCIDevice" value="82599ES 10-Gigabit SFI/SFP+ Network Connection"/>
|
||||
<object type="OSDev" gp_index="133" name="eno1" osdev_type="2">
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<info name="Address" value="ec:f4:bb:d0:f4:08"/>
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||||
</object>
|
||||
</object>
|
||||
<object type="PCIDev" gp_index="121" pci_busid="0000:01:00.1" pci_type="0200 [8086:10fb] [1028:1f72] 01" pci_link_speed="4.923077">
|
||||
<info name="PCIVendor" value="Intel Corporation"/>
|
||||
<info name="PCIDevice" value="82599ES 10-Gigabit SFI/SFP+ Network Connection"/>
|
||||
<object type="OSDev" gp_index="131" name="eno2" osdev_type="2">
|
||||
<info name="Address" value="ec:f4:bb:d0:f4:0a"/>
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||||
</object>
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||||
</object>
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||||
</object>
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||||
<object type="PCIDev" gp_index="120" pci_busid="0000:00:11.4" pci_type="0106 [8086:8d62] [1028:0601] 05" pci_link_speed="0.000000">
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||||
<info name="PCIVendor" value="Intel Corporation"/>
|
||||
<info name="PCIDevice" value="C610/X99 series chipset sSATA Controller [AHCI mode]"/>
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||||
</object>
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||||
<object type="Bridge" gp_index="124" bridge_type="1-1" depth="1" bridge_pci="0000:[07-07]" pci_busid="0000:00:1c.4" pci_type="0604 [8086:8d18] [1028:0601] d5" pci_link_speed="1.230769">
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||||
<info name="PCIVendor" value="Intel Corporation"/>
|
||||
<info name="PCIDevice" value="C610/X99 series chipset PCI Express Root Port #5"/>
|
||||
<object type="PCIDev" gp_index="115" pci_busid="0000:07:00.0" pci_type="0200 [8086:1521] [1028:1f73] 01" pci_link_speed="1.230769">
|
||||
<info name="PCIVendor" value="Intel Corporation"/>
|
||||
<info name="PCIDevice" value="I350 Gigabit Network Connection"/>
|
||||
<object type="OSDev" gp_index="132" name="eno3" osdev_type="2">
|
||||
<info name="Address" value="ec:f4:bb:d0:f4:0c"/>
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||||
</object>
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||||
</object>
|
||||
<object type="PCIDev" gp_index="123" pci_busid="0000:07:00.1" pci_type="0200 [8086:1521] [1028:1f73] 01" pci_link_speed="1.230769">
|
||||
<info name="PCIVendor" value="Intel Corporation"/>
|
||||
<info name="PCIDevice" value="I350 Gigabit Network Connection"/>
|
||||
<object type="OSDev" gp_index="130" name="eno4" osdev_type="2">
|
||||
<info name="Address" value="ec:f4:bb:d0:f4:0d"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="Bridge" gp_index="111" bridge_type="1-1" depth="1" bridge_pci="0000:[08-0c]" pci_busid="0000:00:1c.7" pci_type="0604 [8086:8d1e] [1028:0601] d5" pci_link_speed="0.250000">
|
||||
<info name="PCIVendor" value="Intel Corporation"/>
|
||||
<info name="PCIDevice" value="C610/X99 series chipset PCI Express Root Port #8"/>
|
||||
<object type="Bridge" gp_index="112" bridge_type="1-1" depth="2" bridge_pci="0000:[09-0c]" pci_busid="0000:08:00.0" pci_type="0604 [1912:001d] [1912:001d] 00" pci_link_speed="0.250000">
|
||||
<info name="PCIVendor" value="Renesas Technology Corp."/>
|
||||
<info name="PCIDevice" value="SH7758 PCIe Switch [PS]"/>
|
||||
<object type="Bridge" gp_index="107" bridge_type="1-1" depth="3" bridge_pci="0000:[0a-0b]" pci_busid="0000:09:00.0" pci_type="0604 [1912:001d] [1912:001d] 00" pci_link_speed="0.250000">
|
||||
<info name="PCIVendor" value="Renesas Technology Corp."/>
|
||||
<info name="PCIDevice" value="SH7758 PCIe Switch [PS]"/>
|
||||
<object type="Bridge" gp_index="114" bridge_type="1-1" depth="4" bridge_pci="0000:[0b-0b]" pci_busid="0000:0a:00.0" pci_type="0604 [1912:001a] [1912:001a] 00" pci_link_speed="0.250000">
|
||||
<info name="PCIVendor" value="Renesas Technology Corp."/>
|
||||
<info name="PCIDevice" value="SH7758 PCIe-PCI Bridge [PPB]"/>
|
||||
<object type="PCIDev" gp_index="110" pci_busid="0000:0b:00.0" pci_type="0300 [102b:0534] [1028:0601] 01" pci_link_speed="0.000000">
|
||||
<info name="PCIVendor" value="Matrox Electronics Systems Ltd."/>
|
||||
<info name="PCIDevice" value="G200eR2"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="PCIDev" gp_index="105" pci_busid="0000:00:1f.2" pci_type="0106 [8086:8d02] [1028:0601] 05" pci_link_speed="0.000000">
|
||||
<info name="PCIVendor" value="Intel Corporation"/>
|
||||
<info name="PCIDevice" value="C610/X99 series chipset 6-Port SATA Controller [AHCI mode]"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="Package" os_index="1" cpuset="0xaaaaaaaa" complete_cpuset="0xaaaaaaaa" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="10">
|
||||
<info name="CPUVendor" value="GenuineIntel"/>
|
||||
<info name="CPUFamilyNumber" value="6"/>
|
||||
<info name="CPUModelNumber" value="63"/>
|
||||
<info name="CPUModel" value="Intel(R) Xeon(R) CPU E5-2630 v3 @ 2.40GHz"/>
|
||||
<info name="CPUStepping" value="2"/>
|
||||
<object type="NUMANode" os_index="1" cpuset="0xaaaaaaaa" complete_cpuset="0xaaaaaaaa" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="103" local_memory="67596931072">
|
||||
<page_type size="4096" count="16503157"/>
|
||||
<page_type size="2097152" count="0"/>
|
||||
<page_type size="1073741824" count="0"/>
|
||||
</object>
|
||||
<object type="L3Cache" os_index="1" cpuset="0xaaaaaaaa" complete_cpuset="0xaaaaaaaa" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="15" cache_size="20971520" depth="3" cache_linesize="64" cache_associativity="20" cache_type="0">
|
||||
<info name="Inclusive" value="1"/>
|
||||
<object type="L2Cache" os_index="8" cpuset="0x00020002" complete_cpuset="0x00020002" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="14" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" os_index="8" cpuset="0x00020002" complete_cpuset="0x00020002" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="12" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1iCache" os_index="8" cpuset="0x00020002" complete_cpuset="0x00020002" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="13" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="0" cpuset="0x00020002" complete_cpuset="0x00020002" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="9">
|
||||
<object type="PU" os_index="1" cpuset="0x00000002" complete_cpuset="0x00000002" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="11"/>
|
||||
<object type="PU" os_index="17" cpuset="0x00020000" complete_cpuset="0x00020000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="87"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" os_index="9" cpuset="0x00080008" complete_cpuset="0x00080008" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="25" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" os_index="9" cpuset="0x00080008" complete_cpuset="0x00080008" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="23" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1iCache" os_index="9" cpuset="0x00080008" complete_cpuset="0x00080008" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="24" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="1" cpuset="0x00080008" complete_cpuset="0x00080008" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="21">
|
||||
<object type="PU" os_index="3" cpuset="0x00000008" complete_cpuset="0x00000008" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="22"/>
|
||||
<object type="PU" os_index="19" cpuset="0x00080000" complete_cpuset="0x00080000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="89"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" os_index="10" cpuset="0x00200020" complete_cpuset="0x00200020" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="35" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" os_index="10" cpuset="0x00200020" complete_cpuset="0x00200020" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="33" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1iCache" os_index="10" cpuset="0x00200020" complete_cpuset="0x00200020" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="34" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="2" cpuset="0x00200020" complete_cpuset="0x00200020" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="31">
|
||||
<object type="PU" os_index="5" cpuset="0x00000020" complete_cpuset="0x00000020" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="32"/>
|
||||
<object type="PU" os_index="21" cpuset="0x00200000" complete_cpuset="0x00200000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="91"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" os_index="11" cpuset="0x00800080" complete_cpuset="0x00800080" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="45" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" os_index="11" cpuset="0x00800080" complete_cpuset="0x00800080" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="43" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1iCache" os_index="11" cpuset="0x00800080" complete_cpuset="0x00800080" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="44" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="3" cpuset="0x00800080" complete_cpuset="0x00800080" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="41">
|
||||
<object type="PU" os_index="7" cpuset="0x00000080" complete_cpuset="0x00000080" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="42"/>
|
||||
<object type="PU" os_index="23" cpuset="0x00800000" complete_cpuset="0x00800000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="93"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" os_index="12" cpuset="0x02000200" complete_cpuset="0x02000200" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="55" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" os_index="12" cpuset="0x02000200" complete_cpuset="0x02000200" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="53" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1iCache" os_index="12" cpuset="0x02000200" complete_cpuset="0x02000200" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="54" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="4" cpuset="0x02000200" complete_cpuset="0x02000200" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="51">
|
||||
<object type="PU" os_index="9" cpuset="0x00000200" complete_cpuset="0x00000200" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="52"/>
|
||||
<object type="PU" os_index="25" cpuset="0x02000000" complete_cpuset="0x02000000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="95"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" os_index="13" cpuset="0x08000800" complete_cpuset="0x08000800" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="65" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" os_index="13" cpuset="0x08000800" complete_cpuset="0x08000800" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="63" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1iCache" os_index="13" cpuset="0x08000800" complete_cpuset="0x08000800" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="64" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="5" cpuset="0x08000800" complete_cpuset="0x08000800" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="61">
|
||||
<object type="PU" os_index="11" cpuset="0x00000800" complete_cpuset="0x00000800" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="62"/>
|
||||
<object type="PU" os_index="27" cpuset="0x08000000" complete_cpuset="0x08000000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="97"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" os_index="14" cpuset="0x20002000" complete_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="75" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" os_index="14" cpuset="0x20002000" complete_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="73" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1iCache" os_index="14" cpuset="0x20002000" complete_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="74" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="6" cpuset="0x20002000" complete_cpuset="0x20002000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="71">
|
||||
<object type="PU" os_index="13" cpuset="0x00002000" complete_cpuset="0x00002000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="72"/>
|
||||
<object type="PU" os_index="29" cpuset="0x20000000" complete_cpuset="0x20000000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="99"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<object type="L2Cache" os_index="15" cpuset="0x80008000" complete_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="85" cache_size="262144" depth="2" cache_linesize="64" cache_associativity="8" cache_type="0">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1Cache" os_index="15" cpuset="0x80008000" complete_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="83" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="1">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="L1iCache" os_index="15" cpuset="0x80008000" complete_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="84" cache_size="32768" depth="1" cache_linesize="64" cache_associativity="8" cache_type="2">
|
||||
<info name="Inclusive" value="0"/>
|
||||
<object type="Core" os_index="7" cpuset="0x80008000" complete_cpuset="0x80008000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="81">
|
||||
<object type="PU" os_index="15" cpuset="0x00008000" complete_cpuset="0x00008000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="82"/>
|
||||
<object type="PU" os_index="31" cpuset="0x80000000" complete_cpuset="0x80000000" nodeset="0x00000002" complete_nodeset="0x00000002" gp_index="101"/>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
</object>
|
||||
<distances2 type="NUMANode" nbobjs="2" kind="5" name="NUMALatency" indexing="os">
|
||||
<indexes length="4">0 1 </indexes>
|
||||
<u64values length="12">10 21 21 10 </u64values>
|
||||
</distances2>
|
||||
<support name="discovery.pu"/>
|
||||
<support name="discovery.numa"/>
|
||||
<support name="discovery.numa_memory"/>
|
||||
<support name="discovery.disallowed_pu"/>
|
||||
<support name="discovery.disallowed_numa"/>
|
||||
<support name="discovery.cpukind_efficiency"/>
|
||||
<support name="cpubind.set_thisproc_cpubind"/>
|
||||
<support name="cpubind.get_thisproc_cpubind"/>
|
||||
<support name="cpubind.set_proc_cpubind"/>
|
||||
<support name="cpubind.get_proc_cpubind"/>
|
||||
<support name="cpubind.set_thisthread_cpubind"/>
|
||||
<support name="cpubind.get_thisthread_cpubind"/>
|
||||
<support name="cpubind.set_thread_cpubind"/>
|
||||
<support name="cpubind.get_thread_cpubind"/>
|
||||
<support name="cpubind.get_thisproc_last_cpu_location"/>
|
||||
<support name="cpubind.get_proc_last_cpu_location"/>
|
||||
<support name="cpubind.get_thisthread_last_cpu_location"/>
|
||||
<support name="membind.set_thisthread_membind"/>
|
||||
<support name="membind.get_thisthread_membind"/>
|
||||
<support name="membind.set_area_membind"/>
|
||||
<support name="membind.get_area_membind"/>
|
||||
<support name="membind.alloc_membind"/>
|
||||
<support name="membind.firsttouch_membind"/>
|
||||
<support name="membind.bind_membind"/>
|
||||
<support name="membind.interleave_membind"/>
|
||||
<support name="membind.migrate_membind"/>
|
||||
<support name="membind.get_area_memlocation"/>
|
||||
<support name="custom.exported_support"/>
|
||||
<cpukind cpuset="0xffffffff">
|
||||
<info name="FrequencyMaxMHz" value="3200"/>
|
||||
</cpukind>
|
||||
</topology>
|
Loading…
Reference in New Issue
Block a user