Commit Graph

49 Commits

Author SHA1 Message Date
989ae0c0ea Determine slice using msr instead of reversed hashing fn 2024-06-27 11:09:06 +02:00
Guillaume DIDIER
1876dc7db4 Update nix 2024-06-24 15:53:15 +02:00
Guillaume DIDIER
f9217b00c4 Start working on cache detection using Clementine Maurice's performance counter approach.
Add a new crate for that, getting out of cache_utils no_std / use_std mess.
2024-06-24 09:41:56 +02:00
Guillaume DIDIER
8edd90b6a3 Major refactor 2024-05-27 11:51:13 +02:00
Guillume DIDIER
30d9527ceb Remove unnecessary dep in aes-t-tables 2022-09-27 11:13:22 +02:00
Guillume DIDIER
dcc84e8916 Remove unnecessary dependency 2022-09-27 10:46:04 +02:00
Guillume DIDIER
8b227b640b Rename prefetcher_reverse to CacheObserver 2022-09-23 14:19:41 +02:00
Guillume DIDIER
960d7d942c Refactor uneeded dependcy on covert_channel_evaluation
(cherry picked from commit e92dac5c6a57c437a63f24f0efed28e81fd3ce7c)
2022-09-23 11:32:01 +02:00
Guillume DIDIER
559a4ecdf8 General updates 2022-01-25 14:18:03 +01:00
Guillume DIDIER
8edaabea8a Stub the interface to create functions.
This may be turned into a impl of Function.
2021-10-19 16:17:44 +02:00
Guillume DIDIER
cde062b1d6 Update Cargo.lock 2021-10-19 15:17:44 +02:00
Guillume DIDIER
b7b5cbbfc3 Update the cache channel interface 2021-06-28 16:26:02 +02:00
Guillume DIDIER
bad23161a2 Rust nightly update - dendrobates 2021-06-10 11:24:28 +02:00
Guillume DIDIER
4bc389272f Start working on prefetcher reverse engineering experiment 2021-03-22 16:13:01 +01:00
Guillume DIDIER
68263dcd3a New version of the benchmark program 2021-01-28 09:36:15 +01:00
Guillume DIDIER
7a5cae722c New bersion of the side channels, with common implementation for F+R and F+F 2021-01-26 10:03:50 +01:00
Guillume DIDIER
dd290c9774 Update two thread cal to use turn locks 2021-01-08 10:49:59 +01:00
Guillume DIDIER
9a1d0837fa Extra work for better coverage of naive covert channel variability 2020-12-02 16:47:53 +01:00
Guillume DIDIER
168f81a19e Final experiments
Code for final experiments.
2020-11-24 10:25:32 +01:00
Guillume DIDIER
236b8bee48 Final update to AES Major update to covert channel benchmarking 2020-11-20 10:53:10 +01:00
Guillume DIDIER
5eab981eec Major refactor that allows proper core selection
- covert / side channel are currently back in a non functional state
- two thread calibration however qorks and gets full experimental results
2020-10-22 14:38:41 +02:00
GuillaumeDIDIER
f17ca91e82 Various dependency updates - should now compile again 2020-09-29 10:51:24 +02:00
GuillaumeDIDIER
74ca41c273 Update dependencies 2020-09-29 09:52:00 +02:00
GuillaumeDIDIER
0b499abe8a Update dependencies 2020-09-23 10:09:10 +02:00
root
33df427053 Add nix dependency 2020-09-22 14:25:20 +02:00
GuillaumeDIDIER
0819eef0c0 First version of aes T table attack - using flush and reload naively 2020-08-19 10:07:48 +02:00
GuillaumeDIDIER
5cd3150a4b Add a draft module for AES attacks 2020-08-04 14:33:33 +02:00
GuillaumeDIDIER
4db469ae0b Add hashbrown as a dependency to get hashmaps/sets in no_std context 2020-07-15 10:13:58 +02:00
GuillaumeDIDIER
551a201f56 Add dependecy for atomic fn types 2020-07-02 15:38:39 +02:00
GuillaumeDIDIER
6ae16cc6df Update to work with latest nightly 2020-05-29 16:26:53 +02:00
GuillaumeDIDIER
144b4a498a Create and add cpuid crate 2020-05-27 14:00:19 +02:00
GuillaumeDIDIER
fb926dfe2a Refactor to start integrating frequency measurement and portability
- added preliminary tests of frequency measurements
- refactored the signature of calibrate function to parametrize hash function
- various cleanup
2020-05-11 17:04:33 +02:00
guillaume didier
65f94dcb67 General refactor of the calibration implementation when adding l3 hit calibration
This moves most of the logic on a calibrate function taking as a paramater a slice of operations to calibrate
L3 hit is measured by flush followed by preftechnt1, cpuid serialization, timed access
2020-04-01 16:12:15 +02:00
guillaume didier
2e7558c948 Dep upgrade 2020-03-18 14:29:56 +01:00
guillaume didier
05619c5126 Update dependencies for newer nightlies 2020-03-13 12:14:36 +01:00
guillaume didier
639299175f Set up things so that a std binary can be built in cache_utils 2020-03-09 14:27:32 +01:00
guillaume didier
60fe76e366 Implement calibration on full 4k page 2020-02-28 12:03:51 +01:00
guillaume didier
5e4025493b Further dependency upgrade and cleanup, using cargo-upgrade 2020-02-19 15:13:24 +01:00
guillaume didier
da4204f655 Overhaul of dependencies, inluding x86_64 0.9.2 breaking changes 2020-02-19 15:08:24 +01:00
guillaume didier
2da2e7bf8e Rename cache utils 2020-02-05 10:23:52 +01:00
guillaume didier
45881ce2ea Add the interface for getting the cache info and logic to iterate. Only need to add parsing support of more fields 2020-02-04 08:41:49 +01:00
guillaume didier
6a0bd9b757 Start work on the cache info module 2019-12-22 15:24:21 +01:00
guillaume didier
bfeafc9892 Implement memory allocation 2019-11-14 14:26:37 +01:00
Guillaume DIDIER
f4cc148d83 Interrupt handling working and tested.
- int3
- double fault with separate stack
- page fault
2019-11-04 13:54:43 +01:00
Guillaume DIDIER
898da64647 Update bootloader with the fixed upstream 2019-10-21 13:14:50 +02:00
Guillaume DIDIER
e010900715 Test infrastructure
- serial port
- harnesses using qemu
2019-10-21 13:10:53 +02:00
Guillaume DIDIER
5a528f7508 Proper VGA driver, just missing print! / println! support. 2019-10-06 17:16:19 +02:00
Guillaume DIDIER
49d7c3e508 First bootable kernel 2019-10-02 09:52:19 +02:00
Guillaume DIDIER
19b57c3b17 Stub the kernel binary crate 2019-10-01 14:53:54 +02:00