Guillaume DIDIER
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52ef3902f3
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Fix forgotten debug print
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2024-08-16 09:56:25 +02:00 |
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Guillaume DIDIER
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c99e244b71
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Only print detailed information in debug mode
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2024-08-16 09:56:25 +02:00 |
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Guillaume DIDIER
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35b3ec7143
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u64 and usize are not the same type, sorry
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2024-08-16 09:56:25 +02:00 |
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Guillaume DIDIER
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94af9a99cc
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Get the number of available CBox on Intel Core using MSR_UNC_CBO_CONFIG
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2024-08-16 09:56:25 +02:00 |
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Guillaume DIDIER
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d3aa4d1317
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Added debug information.
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2024-08-16 09:56:25 +02:00 |
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93b1f969db
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Add cache_slice's README
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2024-07-11 16:50:03 +02:00 |
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Guillaume DIDIER
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45e5fa84a5
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Fix missing CPU classification
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2024-07-03 09:42:17 +02:00 |
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Guillaume DIDIER
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ddd24e9c20
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Add newer Core CPUs, up to Raptor Lake
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2024-07-03 09:11:33 +02:00 |
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Guillaume DIDIER
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d98c9f5a66
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Scan now displays the scores for each cbox using a one line format
Also remove the duplication between core 0 and core i, after validation that it behaved the same
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2024-07-03 08:53:43 +02:00 |
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Guillaume DIDIER
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69fb1dc2db
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Implement on Core CPUs
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2024-07-03 08:52:12 +02:00 |
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a17aeb33c7
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Use main_core to determine slice
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2024-06-27 11:31:21 +02:00 |
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989ae0c0ea
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Determine slice using msr instead of reversed hashing fn
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2024-06-27 11:09:06 +02:00 |
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087997ce5c
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Fix substraction with overflow
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2024-06-25 09:34:30 +02:00 |
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Guillaume DIDIER
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a7ea11181f
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Add missing CPU model
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2024-06-24 17:40:03 +02:00 |
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Guillaume DIDIER
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88775ea015
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Fix issues in the monitoring logic
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2024-06-24 17:37:14 +02:00 |
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Guillaume DIDIER
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f6494a82b2
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Correct various issues in scan, and set core affinity properly.
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2024-06-24 16:58:32 +02:00 |
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Guillaume DIDIER
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ba87550b65
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Implement slice scanning on Xeon
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2024-06-24 15:53:45 +02:00 |
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Guillaume DIDIER
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f9217b00c4
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Start working on cache detection using Clementine Maurice's performance counter approach.
Add a new crate for that, getting out of cache_utils no_std / use_std mess.
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2024-06-24 09:41:56 +02:00 |
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