Guillume DIDIER
6f8ae88e58
Fixes around cacheline length magic number
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Cache line length is now a constant. This should eventually be replaced with some sort of lazy static info, that is extracted from CPUID if possible.
2021-09-28 08:55:12 +02:00
Guillume DIDIER
a272c79127
More work on unknown cache slicing handling
2021-09-27 16:27:53 +02:00
Guillume DIDIER
8d78c70dae
Rust Update, clean up MMappedMemory
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Ensure the code compiles with the latest rust nightly version, and fixes some unsafety in MMappedMemory
2021-09-20 14:45:40 +02:00
Guillume DIDIER
bf931bfa52
Various experiments
2021-08-02 15:02:52 +02:00
Guillume DIDIER
84cf28f21c
Reproduce the pattern from the other paper
2021-07-25 10:01:41 +02:00
Guillume DIDIER
19b07d1b1f
Change the implementation of various traites to ensure test_single is low overhead
2021-07-21 17:29:02 +02:00
Guillume DIDIER
3c8c00facb
Fix compile issue
2021-07-19 09:33:54 +02:00
Guillume DIDIER
78c4018a04
Document issues around number of handles per page / cache line
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The two channel used to have different invariants. Currently the enforcement of any limitation of handle per page or handle per cache line has been removed, hence document this issue in the code.
2021-07-19 09:17:09 +02:00
Guillume DIDIER
4cbacf96a9
Fix a bug in the improved Basic Timing Cache Channel calibration
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The cache line were not properly reset to Invalid state, which messe up F+R calibration.
The Invalid state calibration is now done with a flush victim op, instead of a noop.
2021-07-19 09:15:20 +02:00
Guillume DIDIER
28f75075e3
Hotfix naive basic timing cache channel for use in prefetcher experiments
2021-07-19 09:01:24 +02:00
Guillume DIDIER
b7b5cbbfc3
Update the cache channel interface
2021-06-28 16:26:02 +02:00
Guillume DIDIER
e4c838e8b0
Rust nightly update - basic_timing_cache_channel
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Make sure this compiles with th newer nightly
2021-06-10 11:17:31 +02:00
Guillume DIDIER
68263dcd3a
New version of the benchmark program
2021-01-28 09:36:15 +01:00
Guillume DIDIER
7a5cae722c
New bersion of the side channels, with common implementation for F+R and F+F
2021-01-26 10:03:50 +01:00
Guillume DIDIER
a331fdd76e
Add a crate meant to one day factorize some common code to timing side channels
2020-10-22 14:49:09 +02:00
