l3-ENSL/dendrobates-t-azureus
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40 Commits

Author SHA1 Message Date
augustin64
30676cd391 Remove reload measurements 2024-06-14 11:06:03 +02:00
augustin64
ead00b5e8a Add all columns back 2024-06-05 11:55:10 +02:00
Guillaume DIDIER
8edd90b6a3 Major refactor 2024-05-27 11:51:13 +02:00
Guillume DIDIER
960d7d942c Refactor uneeded dependcy on covert_channel_evaluation 
(cherry picked from commit e92dac5c6a57c437a63f24f0efed28e81fd3ce7c)
 2022-09-23 11:32:01 +02:00
Guillume DIDIER
c734b5ce53 Refactor ip_tool into cache_utils, start work on cache level calibration 2021-11-24 17:20:04 +01:00
Guillume DIDIER
0807d3bda9 Start working on an experiment to determine load hit time for different cache levels. 
For now only a documentation comment with the design is correct in the file, which currently contains the code of an earlier expermient
 2021-11-24 11:51:15 +01:00
Guillume DIDIER
206d45b823 Finish the function placement module (IP tool) 2021-10-20 13:57:57 +02:00
Guillaume Didier
8c77c1558d Fix comments 2021-10-01 16:38:44 +02:00
Guillaume Didier
3dd5148fe5 Merge branch 'g5k' of https://gitlab.inria.fr/uarch/dendrobates-t-azureus 2021-10-01 11:04:35 +02:00
Guillaume Didier
f7132c911c Optimised experiments 2021-10-01 11:02:20 +02:00
Guillaume Didier
c7b0cc4130 Do not calibrate unneeded ops 2021-09-29 16:45:13 +02:00
Guillume DIDIER
e3ef141792 Performance tweaks 2021-09-29 09:52:12 +02:00
Guillume DIDIER
6f8ae88e58 Fixes around cacheline length magic number 
Cache line length is now a constant. This should eventually be replaced with some sort of lazy static info, that is extracted from CPUID if possible.
 2021-09-28 08:55:12 +02:00
Guillume DIDIER
a272c79127 More work on unknown cache slicing handling 2021-09-27 16:27:53 +02:00
Guillume DIDIER
8d78c70dae Rust Update, clean up MMappedMemory 
Ensure the code compiles with the latest rust nightly version, and fixes some unsafety in MMappedMemory
 2021-09-20 14:45:40 +02:00
Guillume DIDIER
7a5cae722c New bersion of the side channels, with common implementation for F+R and F+F 2021-01-26 10:03:50 +01:00
Guillume DIDIER
d90d572bc9 Update cache util for new nightly 2021-01-05 11:40:34 +01:00
Guillaume DIDIER
10c1f4e5d5 Final fixes (CSV, p==0.0) 2020-12-02 16:30:28 +01:00
Guillume DIDIER
236b8bee48 Final update to AES Major update to covert channel benchmarking 2020-11-20 10:53:10 +01:00
Guillaume DIDIER
7efc28e253 Increase iteration count 2020-11-17 13:51:56 +01:00
Guillume DIDIER
5eab981eec Major refactor that allows proper core selection 
- covert / side channel are currently back in a non functional state
- two thread calibration however qorks and gets full experimental results
 2020-10-22 14:38:41 +02:00
root
654b9b2cdb Cache utils updates 2020-09-22 14:27:52 +02:00
GuillaumeDIDIER
a2d494d610 Threshold computation & calibration enhancements 2020-08-04 14:34:18 +02:00
GuillaumeDIDIER
b815fd34ff Make use of core_per_cocket in complexe slice addressing 2020-07-21 09:38:55 +02:00
GuillaumeDIDIER
0867e8961e Detect correct number of physical core per socket 2020-07-20 13:44:12 +02:00
GuillaumeDIDIER
1d146fe544 Regroup options into a single parameters 2020-07-20 13:43:35 +02:00
GuillaumeDIDIER
0e0d5606bd Add a third function handling the linear hashing functions Im and Ker 2020-07-20 13:42:31 +02:00
GuillaumeDIDIER
6aa5784e22 Add test program for complex addressing image and basis 2020-07-16 11:46:41 +02:00
GuillaumeDIDIER
bf3def8987 Clean up dead code 2020-07-16 11:15:46 +02:00
GuillaumeDIDIER
f7c171b7bc Calibration on the full set of core pairs, reduce array size to compensate size increase 2020-07-09 13:36:27 +02:00
GuillaumeDIDIER
daaca820fd Reformat, fix a bug due to confusing p and pointer in calibrate two thread and add relaod support 2020-07-07 15:07:55 +02:00
GuillaumeDIDIER
cbe2367019 Add warm-up, calibrate more core pairs, to supersed original calibration 2020-07-03 10:27:49 +02:00
GuillaumeDIDIER
77a40a24be Add two thread calibration 2020-07-02 15:40:30 +02:00
GuillaumeDIDIER
bd4028f521 Fix various warnings 2020-07-02 15:39:37 +02:00
GuillaumeDIDIER
d102a755ce Add test programs for frequency / cache component on post-sleep timing differences 2020-05-27 14:03:06 +02:00
GuillaumeDIDIER
fb926dfe2a Refactor to start integrating frequency measurement and portability 
- added preliminary tests of frequency measurements
- refactored the signature of calibrate function to parametrize hash function
- various cleanup
 2020-05-11 17:04:33 +02:00
guillaume didier
5c025fb495 Make the MMappedMemory generic 2020-04-07 14:25:13 +02:00
guillaume didier
158b808d92 Add small utility used to trigger l3 accesses (conjoint use the a uncore cbo measuring utility allow cbo slice reverse) 2020-04-06 11:13:12 +02:00
guillaume didier
5c6c607c8f Add some warm up and fix some output related issues + make the cpuid leaf 4 availale as an util 2020-03-20 16:09:03 +01:00
guillaume didier
f599b74ef3 More analysis results 2020-03-20 16:08:02 +01:00