Add the current experiments
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d64044b43d
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@ -165,6 +165,23 @@ impl<T: TimingChannelPrimitives> NaiveTimingChannel<T> {
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}
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Ok(())
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}
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pub unsafe fn test_debug(
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&self,
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handle: &mut NaiveTimingChannelHandle,
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reset: bool,
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) -> Result<(CacheStatus, u64), SideChannelError> {
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// This should be handled in prepare / unprepare
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let t = unsafe { self.channel_primitive.attack(handle.addr) };
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if T::NEED_RESET && reset {
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unsafe { flush(handle.addr) };
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}
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if self.threshold.is_hit(t) {
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Ok((CacheStatus::Hit, t))
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} else {
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Ok((CacheStatus::Miss, t))
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}
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}
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}
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impl<T: TimingChannelPrimitives> CoreSpec for NaiveTimingChannel<T> {
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8
prefetcher_reverse/run-msr-stream.sh
Executable file
8
prefetcher_reverse/run-msr-stream.sh
Executable file
@ -0,0 +1,8 @@
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#!/bin/bash
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PREFETCH_MSR=$1
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sudo wrmsr -a 0x1a4 $PREFETCH_MSR
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sudo echo wrmsr -a 0x1a4 $PREFETCH_MSR
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sudo rdmsr -a 0x1a4
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cargo run --release --bin stream > stream-with-${PREFETCH_MSR}-prefetcher.log
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sudo rdmsr -a 0x1a4
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8
prefetcher_reverse/run-msr-stride.sh
Executable file
8
prefetcher_reverse/run-msr-stride.sh
Executable file
@ -0,0 +1,8 @@
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#!/bin/bash
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PREFETCH_MSR=$1
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sudo wrmsr -a 0x1a4 $PREFETCH_MSR
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sudo echo wrmsr -a 0x1a4 $PREFETCH_MSR
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sudo rdmsr -a 0x1a4
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cargo run --release --bin strides > strides-with-${PREFETCH_MSR}-prefetcher.log
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sudo rdmsr -a 0x1a4
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5
prefetcher_reverse/setup.sh
Executable file
5
prefetcher_reverse/setup.sh
Executable file
@ -0,0 +1,5 @@
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# performance cpu frequency governor
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cpupower frequency-set -g performance
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# No Turbo Boost
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echo 1 > /sys/devices/system/cpu/intel_pstate/no_turbo
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34
prefetcher_reverse/src/bin/stream.rs
Normal file
34
prefetcher_reverse/src/bin/stream.rs
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@ -0,0 +1,34 @@
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use prefetcher_reverse::{Prober, PAGE_CACHELINE_LEN};
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pub const NUM_ITERATION: usize = 1 << 10;
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fn exp(stride: usize, num_steps: i32, delay: u64) {
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let mut prober = Prober::<2>::new(63).unwrap();
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prober.set_delay(delay);
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let limit = if num_steps < 0 {
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PAGE_CACHELINE_LEN + stride + 2
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} else {
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stride * num_steps as usize
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};
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let pattern = (2usize..limit).step_by(stride).collect::<Vec<_>>();
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let result = prober.full_page_probe(pattern, NUM_ITERATION as u32, 100);
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println!("{}", result);
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}
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fn main() {
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for stride in [3, 4] {
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for delay_shift in [5, 12] {
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let limit = ((PAGE_CACHELINE_LEN + 32) / stride) as i32;
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//for num_steps in -1..limit {
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let num_steps = limit;
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println!(
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"Stride: {}, Limit: {}, Delay: {}",
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stride,
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num_steps,
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1 << delay_shift
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);
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exp(stride, num_steps, 1 << delay_shift);
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//}
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}
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}
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}
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35
prefetcher_reverse/src/bin/strides.rs
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35
prefetcher_reverse/src/bin/strides.rs
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@ -0,0 +1,35 @@
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use prefetcher_reverse::{Prober, PAGE_CACHELINE_LEN};
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pub const NUM_ITERATION: usize = 1 << 10;
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fn exp(stride: usize, num_steps: i32, delay: u64) {
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let mut prober = Prober::<2>::new(63).unwrap();
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prober.set_delay(delay);
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let limit = if num_steps < 0 {
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PAGE_CACHELINE_LEN + stride + 2
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} else {
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stride * num_steps as usize
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};
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let pattern = (2usize..limit).step_by(stride).collect::<Vec<_>>();
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let result = prober.full_page_probe(pattern, NUM_ITERATION as u32, 100);
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println!("{}", result);
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}
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fn main() {
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for stride in [5, 7, 8] {
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for delay_shift in [5, 12, 20] {
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//let stride = 8;
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let limit = (PAGE_CACHELINE_LEN / stride) as i32 + 2;
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//for num_steps in -1..limit {
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let num_steps = limit;
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println!(
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"Stride: {}, Limit: {}, Delay: {}",
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stride,
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num_steps,
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1 << delay_shift
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);
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exp(stride, num_steps, 1 << delay_shift);
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//}
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}
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}
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}
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@ -13,6 +13,7 @@ use cache_side_channel::{
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};
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use cache_utils::calibration::{only_reload, Threshold, PAGE_LEN};
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use cache_utils::mmap::MMappedMemory;
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use cache_utils::rdtsc_nofence;
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use flush_flush::{FFHandle, FFPrimitives, FlushAndFlush};
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use flush_reload::naive::{NFRHandle, NaiveFlushAndReload};
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use flush_reload::{FRHandle, FRPrimitives, FlushAndReload};
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@ -34,12 +35,12 @@ pub const CALIBRATION_STRAT: CalibrationStrategy = CalibrationStrategy::ASVP;
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pub struct Prober<const GS: usize> {
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pages: Vec<MMappedMemory<u8>>,
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ff_handles: Vec<Vec<FFHandle>>,
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fr_handles: Vec<Vec<FRHandle>>,
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//fr_handles: Vec<Vec<NFRHandle>>,
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//fr_handles: Vec<Vec<FRHandle>>,
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fr_handles: Vec<Vec<NFRHandle>>,
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page_indexes: Peekable<Cycle<Range<usize>>>,
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ff_channel: FlushAndFlush,
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fr_channel: FlushAndReload,
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//fr_channel: NaiveFlushAndReload,
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//fr_channel: FlushAndReload,
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fr_channel: NaiveFlushAndReload,
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delay: u64,
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}
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@ -73,8 +74,8 @@ pub enum ProberError {
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/**
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Result of running a probe pattern num_iteration times,
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*/
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pub type SinglePR = u32;
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pub type FullPR = Vec<u32>;
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pub type SinglePR = u64;
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pub type FullPR = Vec<u64>;
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#[derive(Debug)]
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pub enum ProbeResult {
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@ -86,13 +87,13 @@ pub enum ProbeResult {
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#[derive(Debug)]
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pub struct ProbePatternResult {
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pub num_iteration: u32,
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pub pattern_result: Vec<u32>,
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pub pattern_result: Vec<u64>,
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pub probe_result: ProbeResult,
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}
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#[derive(Debug)]
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pub struct DPRItem<PR> {
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pub pattern_result: Vec<u32>,
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pub pattern_result: Vec<u64>,
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pub probe_result: PR,
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}
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@ -114,8 +115,8 @@ pub struct FullPageDualProbeResults {
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#[derive(Debug)]
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pub struct SingleProbeResult {
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pub probe_offset: usize,
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pub pattern_result: Vec<u32>,
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pub probe_result: u32,
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pub pattern_result: Vec<u64>,
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pub probe_result: u64,
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}
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#[derive(Debug)]
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@ -126,6 +127,14 @@ pub struct FullPageSingleProbeResult<const GS: usize> {
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pub results: Vec<SingleProbeResult>,
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}
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fn delay(d: u64) {
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let mut t = unsafe { rdtsc_nofence() };
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let end = t + d;
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while t < end {
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t = unsafe { rdtsc_nofence() };
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}
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}
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// Helper function
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/**
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This function is a helper that determine what is the maximum stride for a pattern of len accesses
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@ -160,16 +169,16 @@ impl<const GS: usize> Prober<GS> {
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Ok(old) => old,
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Err(nixerr) => return Err(ProberError::Nix(nixerr)),
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};
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/*let mut fr_channel = NaiveFlushAndReload::new(Threshold {
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bucket_index: 250,
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let mut fr_channel = NaiveFlushAndReload::new(Threshold {
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bucket_index: 315,
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miss_faster_than_hit: false,
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});*/
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let mut fr_channel = match FlushAndReload::new(core, core, CALIBRATION_STRAT) {
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});
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/*let mut fr_channel = match FlushAndReload::new(core, core, CALIBRATION_STRAT) {
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Ok(res) => res,
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Err(err) => {
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return Err(ProberError::TopologyError(err));
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}
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};
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};*/
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for i in 0..num_pages {
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let mut p = match MMappedMemory::<u8>::try_new(PAGE_LEN * GS, false, false, |j| {
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@ -233,13 +242,14 @@ impl<const GS: usize> Prober<GS> {
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unsafe { self.ff_channel.prepare(&mut ff_handles) };
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let mut pattern_res = vec![CacheStatus::Miss; pattern.pattern.len()];
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let mut pattern_res = vec![0; pattern.pattern.len()];
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for (i, offset) in pattern.pattern.iter().enumerate() {
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let h = &mut self.fr_handles[page_index][*offset];
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pattern_res[i] = unsafe { self.fr_channel.test_single(h, false) }.unwrap();
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if self.delay > 0 {
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pattern_res[i] = unsafe { self.fr_channel.test_debug(h, false) }.unwrap().1;
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delay(self.delay);
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/*if self.delay > 0 {
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thread::sleep(time::Duration::from_nanos(self.delay)); // FIXME parameter magic
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}
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}*/
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//pattern_res[i] = unsafe { self.fr_channel.test_single(h, false) }.unwrap()
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//pattern_res[i] = Miss;
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//unsafe { only_reload(h.to_const_u8_pointer()) };
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@ -286,9 +296,9 @@ impl<const GS: usize> Prober<GS> {
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}
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for (i, res) in pattern_res.into_iter().enumerate() {
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if res == Hit {
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result_ref.pattern_result[i] += 1
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}
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//if res == Hit {
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result_ref.pattern_result[i] += res;
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//}
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}
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}
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}
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@ -454,7 +464,7 @@ impl Display for FullPageDualProbeResults {
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),
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Some(index) => {
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let pat = format!("{:3}", index);
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let sf_ac: u32 = self
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let sf_ac: u64 = self
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.single_probe_results
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.iter()
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.map(|d| d.flush.pattern_result[index])
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@ -462,7 +472,7 @@ impl Display for FullPageDualProbeResults {
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let sf_ac_h = format!("{:8}", sf_ac);
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let sf_ac_hr = format!("{:9.7}", sf_ac as f32 / divider);
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let sr_ac: u32 = self
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let sr_ac: u64 = self
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.single_probe_results
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.iter()
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.map(|d| d.load.pattern_result[index])
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