diff --git a/cache_utils/src/bin/cache_info.rs b/cache_utils/src/bin/cache_info.rs
index d7df9de..c83c483 100644
--- a/cache_utils/src/bin/cache_info.rs
+++ b/cache_utils/src/bin/cache_info.rs
@@ -2,14 +2,34 @@ use cache_utils::cache_info::get_cache_info;
 use cache_utils::complex_addressing::cache_slicing;
 use cpuid::MicroArchitecture;
 
+use std::process::Command;
+use std::str::from_utf8;
+
 pub fn main() {
     println!("{:#?}", get_cache_info());
 
+    let core_per_socket_out = Command::new("sh")
+        .arg("-c")
+        .arg("lscpu | grep socket | cut -b 22-")
+        .output()
+        .expect("Failed to detect cpu count");
+    //println!("{:#?}", core_per_socket_str);
+
+    let core_per_socket_str = from_utf8(&core_per_socket_out.stdout).unwrap();
+
+    //println!("Number of cores per socket: {}", cps_str);
+
+    let core_per_socket: u8 = core_per_socket_str[0..(core_per_socket_str.len() - 1)]
+        .parse()
+        .unwrap_or(0);
+
+    println!("Number of cores per socket: {}", core_per_socket);
+
     if let Some(uarch) = MicroArchitecture::get_micro_architecture() {
         if let Some(vendor_family_model_stepping) = MicroArchitecture::get_family_model_stepping() {
             let slicing = cache_slicing(
                 uarch,
-                8,
+                core_per_socket,
                 vendor_family_model_stepping.0,
                 vendor_family_model_stepping.1,
                 vendor_family_model_stepping.2,
diff --git a/cache_utils/src/bin/two_thread_cal.rs b/cache_utils/src/bin/two_thread_cal.rs
index 8be51b5..e6c2015 100644
--- a/cache_utils/src/bin/two_thread_cal.rs
+++ b/cache_utils/src/bin/two_thread_cal.rs
@@ -40,7 +40,7 @@ fn main() {
 
     //println!("Number of cores per socket: {}", cps_str);
 
-    let core_per_socket: i32 = core_per_socket_str[0..(core_per_socket_str.len() - 1)]
+    let core_per_socket: u8 = core_per_socket_str[0..(core_per_socket_str.len() - 1)]
         .parse()
         .unwrap_or(0);
 
@@ -151,6 +151,7 @@ fn main() {
                 verbosity: verbose_level,
                 optimised_addresses: true,
             },
+            core_per_socket,
         );
     }
 }
diff --git a/cache_utils/src/calibration.rs b/cache_utils/src/calibration.rs
index 24bfe2a..d5cf45a 100644
--- a/cache_utils/src/calibration.rs
+++ b/cache_utils/src/calibration.rs
@@ -497,8 +497,17 @@ pub unsafe fn calibrate_fixed_freq_2_thread<I: Iterator<Item = (usize, usize)>>(
     cores: &mut I,
     operations: &[CalibrateOperation2T],
     options: CalibrationOptions,
+    core_per_socket: u8,
 ) -> Vec<CalibrateResult2T> {
-    calibrate_fixed_freq_2_thread_impl(p, increment, len, cores, operations, options)
+    calibrate_fixed_freq_2_thread_impl(
+        p,
+        increment,
+        len,
+        cores,
+        operations,
+        options,
+        core_per_socket,
+    )
 }
 
 // TODO : Add the optimised address support
@@ -512,6 +521,7 @@ fn calibrate_fixed_freq_2_thread_impl<I: Iterator<Item = (usize, usize)>>(
     cores: &mut I,
     operations: &[CalibrateOperation2T],
     options: CalibrationOptions,
+    core_per_socket: u8,
 ) -> Vec<CalibrateResult2T> {
     if options.verbosity >= Thresholds {
         println!(
@@ -530,7 +540,7 @@ fn calibrate_fixed_freq_2_thread_impl<I: Iterator<Item = (usize, usize)>>(
         if let Some(vendor_family_model_stepping) = MicroArchitecture::get_family_model_stepping() {
             Some(cache_slicing(
                 uarch,
-                8,
+                core_per_socket,
                 vendor_family_model_stepping.0,
                 vendor_family_model_stepping.1,
                 vendor_family_model_stepping.2,