From b0784fadf85cbc9c5854a56155ce441e373d137e Mon Sep 17 00:00:00 2001
From: GuillaumeDIDIER <guillaume.didier95@hotmail.fr>
Date: Tue, 2 Jun 2020 17:29:55 +0200
Subject: [PATCH] Support microarchitecture for g5k experiments

---
 cache_utils/src/complex_addressing.rs | 5 ++++-
 cache_utils/src/main.rs               | 2 ++
 2 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/cache_utils/src/complex_addressing.rs b/cache_utils/src/complex_addressing.rs
index 7e11b93..09d0440 100644
--- a/cache_utils/src/complex_addressing.rs
+++ b/cache_utils/src/complex_addressing.rs
@@ -30,7 +30,10 @@ pub fn cache_slicing(uarch: MicroArchitecture, physical_cores: u8) -> CacheSlici
         | MicroArchitecture::CoffeeLake => {
             ComplexAddressing(&SANDYBRIDGE_TO_SKYLAKE_FUNCTIONS[0..((trailing_zeros + 1) as usize)])
         }
-        MicroArchitecture::SandyBridge => {
+        MicroArchitecture::SandyBridge
+        | MicroArchitecture::Haswell | MicroArchitecture::HaswellE
+        | MicroArchitecture::Broadwell
+        | MicroArchitecture::IvyBridge | MicroArchitecture::IvyBridgeE => {
             ComplexAddressing(&SANDYBRIDGE_TO_SKYLAKE_FUNCTIONS[0..((trailing_zeros) as usize)])
         }
         _ => Unsupported,
diff --git a/cache_utils/src/main.rs b/cache_utils/src/main.rs
index c935e5e..c8faec5 100644
--- a/cache_utils/src/main.rs
+++ b/cache_utils/src/main.rs
@@ -15,6 +15,7 @@ use nix::unistd::Pid;
 use nix::Error::Sys;
 
 use cache_utils::mmap::MMappedMemory;
+use cpuid::MicroArchitecture;
 
 /* from linux kernel headers.
 #define HUGETLB_FLAG_ENCODE_SHIFT       26
@@ -41,6 +42,7 @@ pub fn main() {
 
     // Let's grab all the list of CPUS
     // Then iterate the calibration on each CPU core.
+    eprintln!("CPU MicroArch: {:?}", MicroArchitecture::get_micro_architecture());
     eprint!("Warming up...");
     for i in 0..(CpuSet::count() - 1) {
         if old.is_set(i).unwrap() {